STA_L1h - STA Tool & Flow at different stages
STA_L1e -Timing Optimization During Logic Synthesis
DVD - Lecture 11a: Sign-off Timing
VLSI - STA - SDC Commands Overview
UPF Supply Sets Series - Part 4: Black Box, Extracted Timing & Block Abstract Model Flows
STA_L2f - Unateness of Complex Gates and System Timing Arc
Inputs to STA Analysis? | STA | RTL Netlist | Timing Constraints
STA_L2d - Unateness in OR Gate
STA_S2_L1_Intro Session - Static Timing Analysis (Basic To Advance)