Running Zephyr RTOS on Cadence® Tensilica® HiFi 4 DSP - Iuliana Prodan, NXP
Weaving Xtensa Yarns with Zephyr, Notes on an Idiosyncratic Architecture
Fluent.ai: Edge-Based Voice Control for Hearables on Cadence Tensilica HiFi 5 DSP
Tensilica HiFi DSP -- Cadence Design Systems
Alango Technologies: Hearing and Voice Enhancement DSP Algorithms on Cadence Tensilica HiFi DSPs
Tensilica HiFi 5 DSP Enabling Machines for Voice UI
Cadence Demonstration of Tensilica DSPs' Vision and AI Capabilities for Industrial Products
Minima Processor uses Cadence Tensilica HiFi Mini for 40 nm low-power process
Tensilica HiFi 5 DSP : Paul McLellan's Breakfast Buffet October
Whiteboard Wednesdays - Tensilica DSPs, Sensors, and Neural Networks
IoT True Wireless Stereo Applications Shine with RISC-V and HiFi DSP - Casey Ng, Cadence
Enabling Sound Open Firmware on Arm® Cortex®-a Based Devices Using Zephyr RTOS - Daniel Baluta, NXP
Tensilica Processor IP Education Kit
Cardo Systems Delivers Cutting-Edge Audio Connectivity to Groups in Motion Using Tensilica HiFi DSP
The Hacker’s Perspective: Zephyr OS and On-Device Runtime Protection - Natali Tshuva, Sternum IoT
Building an Open Source Smartwatch Using Zephyr - Jakob Krantz, u-blox
Cadence Tensilica IP Solutions for Automotive Market
Unlocking the Power of POSIX Support in Zephyr RTOS - Alexey Brodkin, Synopsys
Build a Pump Monitor for Railway Applications with Zephyr OS - Oliver Völckers & Jonas Remmert
Hitex Webinar with PLS Multi core and multi controller debugging for AURIX with UDE
